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FEATURES AC PERFORMANCE Small Signal Bandwidth: 80 MHz (A V = -1) Slew Rate: 450 V/ s Full Power Bandwidth: 6.8 MHz at 20 V p-p, R L = 500 Fast Settling: for 10 V Step: 110 ns to 0.01%, 80 ns to 0.1% Differential Gain: <0.01% @ 4.4 MHz Differential Phase: <0.028 @ 4.4 MHz Total Harmonic Distortion (THD): 0.0005% @ 100 kHz Open-Loop Transimpedance: 200 M Input Voltage Noise: 2 nV/Hz DC PERFORMANCE Input Offset Voltage: 75 V max (B Grade) Input Offset Drift: 3.5 V/ C max (B Grade) Quiescent Supply Current: 6.5 mA max APPLICATIONS High Speed DAC Buffers Multiflash ADC Error Amplifiers Flash ADC Buffers Coaxial Cable Drivers High Performance Audio Circuitry Available in Plastic Mini-DIP, Hermetic Cerdip, and Plastic SOIC (A) Package MIL-STD-883B Part Available PRODUCT DESCRIPTION
450 V/ s, Precision, Current-Feedback Op Amp AD846
CONNECTION DIAGRAMS Plastic Mini-DIP (N) Package and Cerdip (Q) Package
SOIC (R) Package
NC 1 NC 2 -INPUT 3 NC 4 +INPUT 5 NC 6 - +
16 NC 15 NC 14 +VS 13 NC 12 OUTPUT
AD846
11 COMPENSATION TOP VIEW -VS 7 (Not to Scale) 10 NC
NC 8
9
NC
NC = NO CONNECT
The AD846 is a monolithic, very high speed operational amplifier offering high performance. Although technically classed as a current-feedback or transimpedance amplifier, it may be used in much the same way as traditional op amps while providing significant performance benefits. Employing Analog Devices' junction isolated complementary bipolar (CB) process, the AD846 achieves true "12-bit" (0.01%) precision on critical ac and dc parameters, a level of performance unmatched by amplifiers fabricated using either the dielectrically isolated (DI) or other bipolar processes. The AD846 offers significant advantages over conventional high speed operational amplifiers. It maintains a nearly constant bandwidth and settling time to 0.01% over a wide range of closed-loop gains. This makes the AD846 ideal for amplifying the residue in multiple-pass analog-to-digital converters. Other advantages include: low input errors and high open-loop transresistance (200 M) into a 500 load, ensuring true 12-bit dc accuracy for closed-loop gains from -1 to gains greater than -100. This combination of ac and dc performance makes the AD846 an excellent choice for buffering precision high speed DACs and flash ADCs. REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
The AD846 is available in three performance grades. The AD846A and AD846B are rated over the industrial temperature range of -40C to +85C. The AD846S is rated over the full military temperature range of -55C to +125C and is available processed to MIL-STD-883B, Rev C. The AD846 is available in two types of 8-lead packages: plastic mini-DIP and hermetic cerdip. The AD846AR-16 is available in the 16-lead SOIC package. "A" and "S" grade chips are also available.
PRODUCT HIGHLIGHTS
1. The AD846 achieves settling times of 110 ns to 0.01% for gains of -1 to -10, with a 450 V/s slew rate, while consuming only 5 mA of supply current. 2. For closed-loop gains of -1 to -100, the high speed performance of the AD846 is achieved without sacrificing full 12-bit dc precision. 3. The AD846 is well suited to line driver and video buffer applications where the properties of low distortion and high slew rate are required.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000
AD846-SPECIFICATIONS
Model INPUT OFFSET VOLTAGE1 Initial TMIN -TMAX vs. Temperature vs. Supply (PSRR) Initial TMIN -TMAX vs. Common Mode (CMRR) Initial TMIN-TMAX INPUT BIAS CURRENT3 -Input Bias Current Initial TMIN -TMAX vs. Temperature vs. Supply Initial TMIN -TMAX vs. Common Mode Initial TMIN -TMAX +Input Bias Current Initial TMIN -TMAX vs. Temperature vs. Supply Initial TMIN -TMAX vs. Common Mode Initial TMIN -TMAX INPUT CHARACTERISTICS Input Resistance -Input +Input Input Capacitance -Input +Input INPUT VOLTAGE RANGE Common Mode INPUT VOLTAGE NOISE Input Current Noise -Input +Input OPEN LOOP TRANSRESISTANCE Conditions
(@ +25 C and
Min
15 V dc, unless otherwise noted)
Min AD846B Typ Max 25 50 0.8 120 116 120 116 125 120 125 120 75 125 3.5 110 94 110 94 Min AD846S Typ Max 25 100 1 125 116 125 116 200 350 5.5 Units V V V/C dB dB dB dB
AD846A Typ Max 25 50 0.8 200 350 5
5 V-18 V2 VCM = 10 V 110 110 110 110 125 120 125 120
150 450 6 5 V-18 V2 VCM = 10 V 9 11 5 5 3 4 15 5 V-18 V2 VCM = 10 V 5 5 5 5
450 1200 20 15 20 10 15 15 20 80 15 20 15 15
100 400 6 9 11 3 3 3 4 15 5 5 3 3
250 750 17 10 15 5 7 5 7 45 10 15 10 10
150 450 1000 1500 9 20 9 11 5 5 3 5 15 5 5 5 5 15 25 10 20 15 20 80 15 20 15 20
nA nA nA/C nA/V nA/V nA/V nA/V A A nA/C nA/V nA/V nA/V nA/V
50 10 2 2 10 F = 1 kHz 1 kHz 1 kHz VOUT = 10 V RLOAD = 500 TMIN -TMAX RLOAD = 500 Short Circuit Open Loop AV = -1 RF = 1k AV = -10 RF = 875 AV = -30 RF = 875 VOUT = 20 V p-p RI = 500 AV = -1 AV = -1 AV = -1 to 0.1% to 0.01% F = 100 kHz 2 20 6 10
50 10 2 2 10 2 20 6
50 10 2 2
k pF pF V nV/Hz pA/Hz pA/Hz
2 20 6
100 50 10
200
150 75 10
200
100 50 10
200
M M V mA MHz MHz MHz MHz ns % V/s ns ns %
OUTPUT CHARACTERISTICS Voltage Current Output Resistance FREQUENCY RESPONSE Small Signal Bandwidth (-3 dB) Full Power Bandwidth4 Rise Time Overshoot Slew Rate Settling Time 10 V Step, AV = -1 TOTAL HARMONIC DISTORTION5
65 16 80 31 15 6.8 110 20 450 80 110 0.0005
65 16 80 31 15 6.8 10 20 450 80 110 0.0005
65 16 80 31 15 6.8 10 20 450 80 110 0.0005
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REV. C
AD846
Model DIFFERENTIAL GAIN DIFFERENTIAL PHASE POWER SUPPLY Rated Performance Operating Range Quiescent Current TRANSISTOR COUNT Conditions F = 4.4 MHz, RL = 100 F = 4.4 MHz, RL = 100 Min AD846A Typ Max 0.01 0.028 15 5 72 18 6.5 Min AD846B Typ Max 0.01 0.028 15 5 72 18 6.5 5 5 72 7 Min AD846S Typ Max 0.01 0.028 15 18 Units % Degrees V V mA
5 TMIN -TMAX
5
NOTES 1 Input Offset Voltage Specifications are guaranteed after 5 minutes at T A = +25C. 2 Test Conditions: +V S = 15 V, -V S = 5 V to 18 V and +V S = 5 V to 18 V, -VS = 15 V. 3 Bias Current Specifications are guaranteed maximum after 5 minutes at T A = +25C. 4 FPBW = Slew Rate/2 VPEAK. 5 Total Harmonic Distortion. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS 1
ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 W Cerdip Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W Common-Mode Input Voltage, Max Safe . . . . . . . |VS| - 3 V Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 1 V Continuous Input Current Inverting or Noninverting . . . . . . . . . . . . . . . . . . . . 2.0 mA Storage Temperature Range (Q) . . . . . . . . . -65C to +150C Storage Temperature Range (N) . . . . . . . . . -65C to +125C Storage Temperature Range (R) . . . . . . . . . -65C to +125C Operating Temperature Range AD846A/B . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C AD846S . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C Lead Temperature Range (Soldering 60 sec) . . . . . . . +300C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3500 V
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Maximum internal power dissipation is specified so that T J does not exceed +175C at an ambient temperature of +25C, derate cerdip (Q) package at 8.7 mW/C and plastic (N) package at 10 mW/C. Plastic Package: JA = 100C/Watt, JC = 33C/W. Cerdip Package: JA = 110C/Watt, JC = 30C/W. SOIC Package: JA = 100C/Watt, JC = 33C/W.
Model1 AD846AN AD846BN AD846AQ AD846BQ AD846SQ AD846SQ/883B 5962-8964601PA AD846AR-16 AD846AR-16-REEL
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C -55C to +125C -55C to +125C -40C to +85C -40C to +85C
Package Option2 N-8 N-8 Q-8 Q-8 Q-8 Q-8 Q-8 R-16 R-16
NOTES 1 "A" and "S" grade chips are also available. 2 N = Plastic DIP Package; Q = Cerdip Package, R = SOIC Package
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm). Consult factory for latest dimensions.
REV. C
-3-
AD846 - Typical Characteristics
Figure 1. Input Voltage Swing vs. Supply
Figure 2. Output Voltage Swing vs. Supply
Figure 3. Quiescent Current vs. Supply Voltage
Figure 4. Quiescent Supply Current vs. Temperature
Figure 5. Output Voltage Swing vs. Resistive Load
Figure 6. Large Signal Frequency Response
Figure 7. Open-Loop Transimpedance vs. Supply
Figure 8. Positive Input Bias Current vs. Common-Mode Voltage
Figure 9. Negative Input Bias Current vs. Common-Mode Voltage
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REV. C
AD846
Figure 10. Positive Input Bias Current vs. Temperature
Figure 11. Negative Input Bias Current vs. Temperature
Figure 12. Power Supply Rejection vs. Frequency
Figure 13. Common-Mode Rejection vs. Frequency
Figure 14. Input Noise Voltage Spectral Density
Figure 15. Inverting Input Noise Current Spectral Density
Figure 16. Short Circuit Current Limit vs. Temperature
Figure 17. Slew Rate vs. Temperature
Figure 18. Slew Rate vs. Input Error Signal
REV. C
-5-
AD846 - Typical Characteristics, Inverting Gain of 1
Figure 19a. Inverting Amplifier, Gain of 1
Figure 19b. Large Signal Pulse Response, Gain of -1
Figure 20. Normalized Output Amplitude vs. Frequency vs. Load
Figure 21. Phase Shift vs. Frequency
Figure 22. Total Harmonic Distortion vs. Frequency
Figure 23. Settling Time vs. Step Size
Figure 24. 3 dB Bandwidth vs. Supply Voltage
Figure 25. Output Impedance vs. Frequency
Figure 26. -3 dB Bandwidth vs. Temperature
-6-
REV. C
Typical Characteristics, Inverting Gain of 10 - AD846
Figure 27a. Inverting Amplifier, Gain of 10
Figure 27b. Large Signal Pulse Response, Gain of 10
Figure 28. Normalized Output Amplitude vs. Frequency vs. Load
Figure 29. Phase vs. Frequency vs. Load
Figure 30. Harmonic Distortion vs. Frequency
Figure 31. Settling Time vs. Step Size
Figure 32. 3 dB Bandwidth vs. Supply Voltage
Figure 33. Output Impedance vs. Frequency
Figure 34. -3 dB Bandwidth vs. Temperature
REV. C
-7-
AD846
POWER SUPPLY CONSIDERATIONS
The power supply connections to the AD846 must maintain a low impedance to ground over a bandwidth of 40 MHz or more. This is especially important when driving a significant resistive or capacitive load, since all current delivered to the load comes from the power supplies. Multiple high quality bypass capacitors are recommended for each power supply line in any critical application. A 0.1 F ceramic and a 2.2 F electrolytic capacitor as shown in Figure 35 placed as close as possible to the amplifier (with short lead lengths to power supply common) will assure adequate high frequency bypassing, in most applications. A minimum bypass capacitance of 0.1 F should be used for any application.
Figure 37. Overload Recovery Test Circuit
Figure 35. Recommended Power Supply Bypassing
THEORY OF OPERATION
The AD846 differs from conventional operational amplifiers in that it is a transimpedance device rather than a conventional voltage amplifier. Figure 36 is a simplified schematic of the AD846. The input stage consists of a pair of transistors, Q1 and Q2, which are biased by two diode-connected transistors, Q3 and Q4. Transistors Q1 and Q2 have their emitters connected together, and this common point functions as the inverting input of the amplifier. Correspondingly, the common connection of the two biasing diodes acts as the noninverting input.
Figure 38. Overload Recovery Time Photo
Because the input error signal developed is in the form of a current, not a voltage, the AD846 differs from conventional operational amplifiers. This also means that, unlike most operational amplifiers which rely on negative feedback to produce a "virtual ground" at the inverting input terminal, this terminal explicitly has a low impedance. A unique circuit approach allows the AD846 to realize an openloop transimpedance of close to 200 M. This is nearly three orders of magnitude greater than that of any other operational transimpedance amplifier and results in extremely high levels of dc precision. As an example, the output voltage gain error is approximately equal to the value of the feedback resistor divided by the value of the open-loop transimpedance of the amplifier. That is, when using a 1 k feedback resistor, this error is one part in 200,000. For a transimpedance amplifier with 1 M transimpedance, this error is only one part in 1000; such an amplifier would barely be able to achieve 10-bit precision. Figure 39 is a simplified three-terminal model for the AD846. Figure 40 is a simplified three-terminal model for a conventional voltage op amp. The action of current feedback serves to modify the behavior of the amplifier under closed-loop conditions. The feedback resistor, RF, is somewhat analogous to the input stage transconductance of a conventional voltage amplifier; and therefore, if the value of RF is held constant, the closed-loop bandwidth also remains virtually constant, independent of closed-loop voltage gain.
Figure 36. AD846 Simplified Schematic
When operated as a closed-loop amplifier, feedback error current, IIN: flows into the inverting input terminal and is conveyed via current mirrors (transistors Q5, Q6, Q7, and Q8) to the compensation capacitor, CCOMP. The voltage developed across CCOMP is buffered by the output stage, consisting of transistors Q9-Q12.
-8-
REV. C
AD846
A simple equation can, therefore, be used to determine the bandwidth of an amplifier employing the AD846 in the inverting configuration.
3 dB Bandwidth = 23 RF + 0.05 (1 + G )
where: The 3 dB bandwidth is in MHz G is the closed-loop inverting gain of the AD846 RF is the feedback resistance in k.
Figure 39. AD846 Three-Terminal Model
NOTE: This equation applies only for values of RF between 10 k and 100 k, and for RLOAD greater than 500 . For RF = 1 k the bandwidth should be estimated from Figure 41. Figure 41 illustrates the closed-loop voltage gain vs. frequency of the AD846 for various values of feedback resistor. For comparison purposes, the characteristic of a conventional amplifier having an 80 MHz unity gain bandwidth is also shown.
Figure 40. Op Amp Three-Terminal Model
A more detailed examination of the closed-loop transfer function of the AD846 results in the following equation:
-RF RS
Closed-Loop Gain G(s) =
RF 1+ CCOMP RF + 1+ R RIN s S
Compare this to the equation for a conventional op amp: -RF RS CCOMP RF Closed-Loop Gain G(s) = 1+ R s 1+ g M S where: CCOMP is the internal compensation capacitor of the amplifier; gM is the input stage transconductance of the amplifier. In the case of the voltage amplifier, the closed-loop bandwidth decreases directly with increasing values of (1 + RF/RS), the closed-loop gain. However, for the transimpedance amplifier, the situation is different. At low gains, where (1 + RF/RS) RIN is small compared to RF, the closed-loop bandwidth is controlled by the internal compensation capacitance of 7 pF and the value of RF, and not by the closed-loop gain. At higher gains, where (1 + RF/RS) RIN is much larger than RF, the behavior is that of a conventional operational amplifier in which the input stage transconductance is equal to the inverting terminal input impedance of the transimpedance amplifier (RIN = 50 ).
Figure 41. Closed-Loop Voltage Gain vs. Bandwidth for Various Values of RF
For the case where RF = 1 k and RS = 100 (closed-loop gain of -10), the closed-loop bandwidth is approximately 28 MHz. It should also be noted that the use of a capacitor to shunt RF, a normal practice for stabilizing conventional op amps, will cause this amplifier to become unstable because the closed-loop bandwidth will increase beyond the stable operating frequency. A similar approach can be taken to calculate the noise performance of the amplifier. A simplified noise model is shown in Figure 42. The equivalent mean-square output noise voltage spectral density will equal:
R 2 2 2 2 VON = ( RF I NN ) + 1+ F [VN + ( RP INP ) + 4 kT RP ] RS R + 4 kT RF F +1 RS
2
REV. C
-9-
AD846
Where: RP is the external resistance placed in series with the noninverting input RF is the feedback resistor RS is the source resistor INN is the noise current in the inverting input INP is the noise current in the noninverting input VN is the input noise voltage. Typical values for these parameters (@ 1 kHz) in pA/Hz are: INN = 20, IPN = 6, VN = 2. Or, referring to the signal input, the equivalent mean-square input voltage noise is:
VIN
2
(R F = 1 k, R S = 10 ) it will be 4 MHz. At gains of 3 or greater, a small capacitor (2 pF-5 pF) connected across the feedback resistor will help reduce overshoot; but when operating at noninverting gains below 3, this same capacitance will cause instability.
R 2 = ( RF I NN ) + 1+ S RF
2
V 2 + R I P NP N
(
)
2
+ 4 kT RP
R + 4 kT RS 1+ S RF
Resistor R P is required for both inverting and noninverting (follower) operation, to insure stable operation. The amplifier's noninverting input current (flowing through RP of 100 ) will typically add less than 300 V to the AD846's input offset voltage. This can be trimmed-out using the optional network shown in Figure 44. The following table gives recommended values for RP. Recommended Value for RF 100 47 0 47 0
Figure 43. AD846 Noninverting Amplifier Configuration
USING THE COMPENSATION PIN OF THE AD846
Additional compensation may be provided for the AD846 by applying an external capacitance between Pin 5 and analog ground (Figure 44). The nominal value of the AD846's internal compensation capacitor is 7 pF. For a given value of feedback resistance (RF), any added external capacitance reduces the amplifier's slew rate and bandwidth proportionally.
Supply Voltage 6 V to 15 V 6 V to 15 V 6 V to 15 V 5V 5V
Gain (RF/RS) 1- 10 10-20 20-200 1- 10 10 -200
Figure 44. AD846 Inverting Amplifier Showing External Compensation Connection, RP and Optional VOS Trim
Figure 42. Op Amp Simplified Noise Model
NONINVERTING GAIN OPERATION
The AD846 can be used as a noninverting amplifier or voltage follower, operating at gains between 1 and 200. A minimum value of RF equal to 1 k should be employed. For low gains (1 to 2), the input signal should be applied to the AD846's noninverting input through a 100 series resistor; this will help reduce peaking. The best transient response will occur when the amplifier's output level is below 5 V peak to peak. At closed-loop gains of 3 or more, the input resistor is not required unless peak signals greater than 3 V will be applied. The amplifier's bandwidth can be determined by using the inverting amplifier's bandwidth equation or from Figure 41. For example, at a gain of + 10 (RF = 1 k, RS = 100 ) the bandwidth of the AD846 will be approximately 33 MHz; at a gain of +100,
In addition to providing for external compensation, Pin 5 may be used to clamp the output of the amplifier, as shown in Figure 45. The output can be clamped anywhere within the output range (approximately 10 V) of the amplifier. The input should also be clamped as a precaution against damaging the amplifier's input transistors.
Figure 45. AD846 Used as a Clamped Amplifier
-10-
REV. C
AD846
This compensation node may also be used as an additional output terminal as in the precision transconductance amplifier application of Figure 46.
THE AD846 AS AN OPEN-LOOP LEVEL SHIFTER
The AD846 can also be used for open-loop level shifting. As shown in Figure 48, resistor R S is used to develop an input current which is proportional to the input voltage, VIN. This current flows from the compensation node (Pin 5) developing a voltage across resistor RC (R C is equal in value to resistor RS) which, rather than being grounded, has one end tied to reference voltage V2. The voltage appearing at Pin 5 is, therefore, voltage VIN plus voltage V2 and will directly follow changes in VIN. By scaling resistor RC, a level shift with voltage gain can be produced. In addition, the normal voltage output at Pin 6 is approximately equal to the voltage at Pin 5 thus providing a low impedance, buffered output for the level shifter.
Figure 46. A Precision Transconductance Amplifier
The AD846 can be used in either the inverting transconductance mode as shown in Figure 46, or in a noninverting mode with RS grounded and VIN applied to the noninverting terminal. The current output is essentially constant over a compliance range of 10 V at the compensation node. The output current (from Pin 5) is limited to about 1 mA due to internal saturation. Under these circumstances the normal output pin provides a buffered version of the compensation node output voltage. Output load impedance of 500 or greater will not affect the accuracy of the transconductance conversion.
THE AD846 IN A 2 MHz, 12-BIT SUBRANGING A/D CONVERTER CIRCUIT
Figure 48. AD846 Connected as a Level Shift Amplifier
THE AD846 AS A HIGH SPEED DAC BUFFER
The combination of fast settling times at high gains and low dc errors make the AD846 ideal for use as an error amplifier in high speed, 12-bit subranging A-D applications. In the circuit of Figure 47, an AD842 serves as an input amplifier. First pass conversion is accomplished, in a straightforward manner, determining the top 7 bits. The latch then holds these top 7 bits which are applied to a 7 bit, 12-bit accurate DAC and also to the highest 7 bits of the adder (note that a sample-and-hold should be used ahead of this converter to minimize errors due to its 500 ns acquisition time). In the second pass, the input switches S1 and S2 and S3 are set to state 2. The DAC output is then subtracted from the input signal and the resulting difference is then amplified by an AD846 gain of 32 follower. This gain, together with a 1/64th scale offset, insures a unipolar residue which can be converted by the flash A-D. Conversion is accomplished via switches S1, S2 and S3 in state 1. Switch S1 connects the input signal of the AD846 residue amplifier to ground which minimized overload recovery time.
The AD846 will enable the AD568 12-bit DAC to develop a 10 V output step which settles to within 0.025 percent of itsfinal value in about 100 ns. This AD846/AD568 combination is shown in the circuit of Figure 49. Correct power supply decoupling is essential: a 2.2 F tantalum capacitor connected in parallel with a 0.1 F to 0.01 F ceramic disc capacitor is usually sufficient. These should be placed as close to the power supply pins as possible. Also, a ground plane should be employed; this ensure that there is a low impedance signal path to ground which allows the fastest possible output settling. In 12-bit systems with the AD846 operating at gains of 10 or less, inadequate supply decoupling can cause the output settling to degrade from 100 ns to as much as 300 ns, with a 10 V output step applied.
Figure 47. Block Diagram of a 2 MHz, 12-Bit Subranging A/D Converter
Figure 49. The AD846 Serving as a DAC Buffer
REV. C
-11-
AD846
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8
5
0.25 0.31 (6.35) (7.87)
1 4
0.39 (9.91) MAX 0.165 (4.19 SEATING PLANE 0.01 0.25) 0.035 (0.89 0.01 0.25)
0.30 (7.62) REF
0.125 (3.18) MIN 0.10 0.003 (2.54) TYP 0.08
0.18 0.03 (4.57 0.76) 0-15 0.033 (0.84) NOM 0.011 (0.28 0.003 0.08)
0.018 0.46
Cerdip (Q) Package
0.005 (0.13) MIN
8
0.055 (1.4) MAX
5
0.25 (0.64)
1
0.220 (5.59) 0.310 (7.87)
4
0.405 (10.29) MAX 0.20 (5.08) MAX SEATING 0.150 PLANE 0.125 (3.18) (3.81) MIN 0.200 (5.08) 0.014 (0.36) 0.1 0.03 (1.76) 0.023 (0.58) (2.54) 0.07 (0.78) BSC 0.015 (0.38) 0.06 (1.52)
0.290 (7.37) 0.320 (8.13)
0-15
0.008 (0.20) 0.015 (0.38)
R-16 Package
0.4133 (10.50) 0.3977 (10.00)
16
9
0.2992 (7.60) 0.2914 (7.40)
1 8
0.4193 (10.65) 0.3937 (10.00)
PIN 1
0.050 (1.27) BSC
0.1043 (2.65) 0.0926 (2.35)
0.0291 (0.74) 0.0098 (0.25)
45
0.0118 (0.30) 0.0040 (0.10)
8 0.0192 (0.49) SEATING 0 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
-12-
REV. C
PRINTED IN U.S.A.
C1155-0-5/00 (rev. C) 00898
Plastic Mini-DIP (N) Package

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